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DATA TRANSMISSION data packet – a small part of a message/data that is transmitted over a network; after transmission all the data packets are reassembled to form the original message/data packet header – the part of the data packet that contains the IP addresses of the sender and receiver, and includes the packet number which allows reassembly of the data packets packet trailer – the part of a data packet that indicates the end of the data packet and cyclic redundancy check error check cyclic redundancy check (CRC) – an error checking method in which all the 1-bits in the data packet payload are added and the total is stored in the packet trailer; the same calculation is repeated at the receiving station payload – the actual data being carried in a data packet node – stages in a network that can receive and transmit data packets; routers are nodes in communication networks packet switching – a method of transmission in which a message is broken into many data packets which can then be sent along pathways independently of each other router – a device that enables data packets to be moved between different networks, for example to join a LAN to a WAN real time streaming – the transmission of data over a network for live events where the data is sent as soon as it is received or generated hopping/hop number – a number in a data packet header used to stop data packets that never reach their destination from ‘clogging up’ the data paths/routes simplex – data that can be sent on one direction only half-duplex – data that can be sent in both directions but not at the same time full-duplex – data that can be sent in both directions at the same time (simultaneously) serial data transmission – sending data down one channel/wire one bit at a time parallel data transmission – sending data down several channels/wires several bits at a time (usually 1 byte) skewed (data) – data that arrives at the destination with the bits no longer synchronized universal serial bus (USB) – a type of serial data transmission which has become the industry standard for connecting computers to devices via a USB port parity check – a method used to check if data has been transferred correctly; it makes use of even parity (an even number of 1-bits) or odd parity (an odd number of 1-bits) parity bit – a bit (either 0 or 1) added to a byte of data in the most significant bit position; this ensures that the byte follows the correct even parity or odd parity protocol parity block – a horizontal and vertical parity check on a block of data being transmitted parity byte – an extra byte of data sent at the end of a parity block; it is composed of the parity bits generated from a vertical parity check of the data block checksum – a verification method used to check if data transferred has been altered or corrupted; calculated from the block of data of data being sent; the checksum value is sent after each data block HARDWARE central processing unit (CPU) – responsible for the execution or processing of all the instructions and data in a computer integrated circuit – usually a chip made from a semiconductor material which carries out the same tasks as a larger circuit made from individual components von Neumann architecture – a type of computer architecture which introduced the concept of the stored program in the 1940s Arithmetic & Logic Unit (ALU) – the component of the CPU that carries out all arithmetic and logical operations accumulator (ACC) – temporary general-purpose register that stores numerical values at any part of a given operation memory address register (MAR) – a register that stores the address of the memory location currently being read from or written to current instruction register (CIR) – a register that stores the current instruction being decoded and executed memory data register (MDR) – a register that stores data that has just been read from memory or data that is about to be written to memory program counter (PC) – a register that stores the address where the next instruction to be read can be found control unit – the component of a computer’s CPU that ensures synchronization of data flow and programs throughout the computer by sending out control signals along the control bus system clock – produces timing signals on the control bus to ensure synchronization takes place clock cycle – clock speeds are measured in terms of GHz; this is the vibrational frequency of the system clock which sends out pulses along the control bus; for example, a 3.5GHZ clock cycle means 3.5 billion clock cycles a second immediate access store (IAS) – memory that holds all data and programs needed to be accessed by the control unit backing store – a secondary storage device (such as HDD or SSD) used to store data permanently even when the computer is powered down cache – is temporary memory using static RAM to hold frequently used data/instructions by the CPU thereby increasing CPU performance. More generally, cache means any area of storage used to quickly access frequently-used data - other examples include web cache, database cache, DNS cache register – a temporary component in the CPU which can be general or specific in its use; it holds data or instructions as part of the Fetch–Decode–Execute cycle address – a label for a memory location used by the CPU to track data memory location – a numbered place in memory where values can be stored system buses – a connection between major components in a computer that can carry data, addresses or control signals address bus – the system bus that carries the addresses throughout the computer system data bus – the system bus that allows data to be carried from CPU to memory (and vice versa) or to and from input/ output devices control bus – the system bus that carries signals from control unit to all other computer components unidirectional – can travel in one direction only; used to describe data bidirectional – can travel in both directions; used to describe data word – a group of bits used by a computer to represent a single unit; for example, modern computers often use 64-bit word lengths overclocking – changing the clock speed of a system clock to a value higher than the factory/recommended setting core – a unit on a CPU made up of an ALU, control unit and registers; a CPU may contain a number of cores dual core – a CPU containing two cores quad core – a CPU containing four cores Fetch–Execute–Decode – a cycle in which instructions and data are fetched from memory, decoded and finally executed Basic Input/Output System (BIOS) – a suite of programs on firmware that are used to perform the initialization of a computer system during the boot-up process opcode – part of a machine code instruction that identifies what action the CPU must perform operand – part of a machine code instruction that identifies what data is to be used instruction set – the complete set of machine code instructions used a particular microprocessor embedded system – a combination of hardware and software designed to carry out a specific set of functions barcode – a series of dark and light lines of varying thickness used to represent data; the code must be scanned using laser or LED light source key field – the field that uniquely identifies a record in a file